High - Accuracy Circuits for On - Chip Capacitor Ratio Testing and

approved. Gabor C. Temes The precise measurement of a capacitance difference or ratio in a digital form is very important for capacitive sensors, for CMOS process characterization as well as for the realization of precise switched-capacitor data converters, amplifiers and other circuits utilizing ratioed capacitors. This thesis introduces design techniques for on-chip capacitor ratio testing and sensor readout that utilize sigma-delta modulation and integrate the sensor capacitors into the modulator. Several single-ended circuits are introduced, and the correlated-double-sampling (CDS) technique is used in the circuits to reduce the non-ideal effects of opamps. Several simple calibration schemes for clock-feedthrough cancellation are also introduced and discussed. A fully-differential implementation is also described and various common-mode feedback schemes are discussed and analyzed. Simulation and experimental results show that these circuits can provide extremely accurate results even in the presence of non-ideal circuit effects such as finite opamp gain, opamp input offset and noise, and clock-feedthrough effect from the switches. To verify the effectiveness of the circuits and simulations, two prototype chips containing a single-ended realization and a fully-differential one were designed and fabricated in a 1.2 pm CMOS technology. Two off-chip mica capacitors were used in the test circuits, and the measured results show that very accurate results can be obtained using these circuit techniques even with off-chip noise coupling and large parasitic capacitances. Redacted for Privacy